1. Simulation test cases are derived and run on the model using
Model-In-the-Loop (MIL) testing.
2. Source code is verified by compiling and executing it on a host computer using Software-In-the-Loop (SIL) testing.
3. Executable object code is verified by cross-compiling and executing it on the embedded processor or an instruction set simulator using Processor-In-the-Loop (PIL) testing.
4. Hardware implementation is verified by synthesizing HDL and executing it on an FPGA using FPGA-In-the-Loop (FIL) testing.
5. The embedded system is verified and validated using the original plant model using Hardware-In-the-Loop (HIL) testing.
A requirements-based test approach with test reuse for models and code is explicitly described in ARP4754A, DO-178C, and DO-331, the model-based design supplement to DO-178C.
refer to:
http://mil-embedded.com/articles/transitioning-do-178c-arp4754a-uav-using-model-based-design/
2. Source code is verified by compiling and executing it on a host computer using Software-In-the-Loop (SIL) testing.
3. Executable object code is verified by cross-compiling and executing it on the embedded processor or an instruction set simulator using Processor-In-the-Loop (PIL) testing.
4. Hardware implementation is verified by synthesizing HDL and executing it on an FPGA using FPGA-In-the-Loop (FIL) testing.
5. The embedded system is verified and validated using the original plant model using Hardware-In-the-Loop (HIL) testing.
A requirements-based test approach with test reuse for models and code is explicitly described in ARP4754A, DO-178C, and DO-331, the model-based design supplement to DO-178C.
refer to:
http://mil-embedded.com/articles/transitioning-do-178c-arp4754a-uav-using-model-based-design/
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